作者：（美）豪杰斯（Hodges,D.A.） 等著
出版社：清华大学出版社
ISBN：7302090610
印次：1
纸张：胶版纸
出版日期：2004-8-1
版次：1
a
内容提要：
本书的第3版，把当前数字集成
电路中已无可争议地占绝对主导地位的CMOS电路技术作为主要内容。全书以当前工业界领先的0.18T微米和0.13微米的
工艺技术为基础，注入了许多深亚微米领域电路设计方面的资料，如最先进的电路制造工艺、BSIM3短沟器件
模型、深亚微米的互连技术和时钟技术、基于逻辑力度（Logic Effort）的高速CMOS电路设计技术、
电源网络设计等。此外，第3版还新增了一些较新和较深的内容，如快闪
存储器（Flash Memory)、铁电存储器（FRAM）、锁相环（PLL）等，因此第3版明显地具有集成电路深亚微米时代的特点。
本书可用作高等院校
电子信息、自动控制、电气工程、精密
仪器等专业本科高年级演密仪器等专业本科高年级和研究生有关集成电路课程的
教材。全书共分11章，其中第1-8章为最基本的内容，第9-11章可根据不同的教学计划和教学要求选择不同的内容。本书各章中内容较深的部分可供讲授研究生课程时选用。由于本书内容选进详实，因此对于从事集成电路设计的工程技术
员来说也
一本不可多得的优秀
考书。
作者简介：
David A.Hodges in the Daniel M. Tellep Distinguished Professor of Engineering Emeritus at the University of California,Berkeley.He Earnes the B.E.E. degree at Cornell University and the M.S. and Ph.D.degrees at the University of Califorina, Berkdley,In 1970 he joined the faculty in Electrical Engineering and Compurter Sciences at UC Berkeley.Following a Year as Chair of the EECS Departemnt,he served as Dean of the College of Engineering from July 1990theroung June1996ASEE Ben jamin Garver Lamme Award ,He was the founding editor of the IEEE Transactions on Seniconductor Manufacturing,and a past editor of the IEEE Jounal of Solid -Srate Circuits. Professof Hodges is a Fellow of the IEEE and a Member of the National Academy of Engineering .He is a Director of Sillicon Image ,Inc .and a former Director of Mentor Graphics.
目录：
1 Deep Subnicron Digital IC Dexign
1.1 Intoduction
1.2 Brief History Logic Design
1.3 Review of Digital Logic Gate Design
1.4 Digital Integrated Circuit Design
1.5 Computer-Aided Design of Digital Circuits
1.6 Tht Callenges Ahead
1.7 Summary
2 Mos Transistors
2.1 Introduction
2.2 Structure and Operation of the MOS Transistor
2.3 Threshold Voltage of the MOS Transistor
2.4 First-Order Current-Voltage Characteristics
2.5 Derivation of Velocity-Saturated Current Equations
2.6 Alpha-Power Law Model
2.7 Subthreshold Comduction
2.8 Capacitances of the MOS Transistor
2.9 Summary
3 Fabrication,Layout,and Simulation
3.1 Introduction
3.2 IC Fabriction Technology
3.3 Layout Baics
3.4 Modeling the MOS Transistor for Circuit Simulation
3.5 SPICE MOS LEVEL 1 Device Model
3.6 BSIM3 Model
3.7 Additional Effects in MOS Transistors
3.8 Silicon-on=Insulation Technology
3.9 SPICE Model Summary
4 MOS Inverter Circuits
5 Static MOS Gate Circuits
6 High-Speed CMOS Logic Design
7 Transfer Gate and Dynamic Logic Design
8 Semiconductor Menory Design
9 Additional Topics in Memory Design
10 Interconnect Design
11 Power Grid and Clock Design
Index
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